Modern CPUs contain far more physical registers than software can directly address. Register renaming, tracked via a Register Alias Table (RAT), maps logical register names to physical registers on the fly. This enables out-of-order execution and superscalar performance by allowing instructions to operate on physical registers without conflicts, and lets speculative results sit in unnamed registers until they are committed. The technique dates back to mainframe computers and is now common in ARM, RISC-V, and FPGA-based soft CPUs.
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