A deep dive into hardware access patterns in Rust for bare-metal embedded systems. Covers three hardware access mechanisms: I/O ports, system/co-processor registers, and memory-mapped I/O (MMIO). Explains why volatile writes are required for MMIO, why creating Rust references to MMIO addresses is unsound, and how bitfields
Table of contents
1.0 Overview2.0 Accessing the Hardware3.0 Bitfields within Registers4.0 Documentation5.0 The Key Players6.0 Rounding UpSort: