In vision AI systems, model throughput continues to improve. The surrounding pipeline stages must keep pace, including decode, preprocessing, and GPU scheduling.

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Scaling VC-6 (SMPTE ST 2117-1) decoding for batched vision AI workloads requires architectural changes beyond single-image kernel tuning. Using NVIDIA Nsight Systems and Nsight Compute, the VC-6 CUDA implementation was redesigned from N separate decoder instances to a single batch decoder, shifting more work to the GPU, introducing minibatch pipelining, and optimizing the range decoder kernel by replacing binary search on shared memory with an unrolled loop using register-resident arrays. These changes yielded up to ~85% lower per-image decode time, submillisecond LoQ-0 (~4K) decode in batch, and ~0.2 ms for lower LoQs, with consistent gains across NVIDIA H100 and B200 GPUs.

Accelerating Vision AI Pipelines with Batch Mode VC-6 and NVIDIA Nsight

Introducing the VC-6 batch mode implementation